1. Field of the Invention
The present invention relates to a semiconductor device having a capacitance element and method of producing the same, and particularly to a technology to shorten a production process of the semiconductor device.
2. Description of the Related Art
A capacitance element is used for a capacitor of a delay circuit and an integration circuit of an LSI, and a DRAM cell. Conventionally, a method to make the capacitance element in the semiconductor device is, for example, as follows.
Initially, a selective oxidation process using a LOCOS method is performed. As a method used when a selective oxide film is formed by the LOCOS method, so called a PBL method (Poly-Buffered LOCOS method) is well known. The PBL method is a method in which, in order to reduce a bird""s beak, previously an insulation film (hereinafter, called pad oxide film) and polycrystalline silicon layer (hereinafter, called padxe2x80xa2polycrystalline silicon layer) are formed between an oxidation resisting film and a semiconductor substrate as a buffer layer. Then, the oxidation resisting film such as silicon nitride film (Si3N4 film) is formed on this upper layer, and by conducting thermal oxidation, an element separation film is formed. After that, the pad polycrystalline silicon layer, the silicon nitride film, or the like, are removed, and after that, a dummy oxide film is formed by thermal oxidation.
Then, through the dummy oxide film, impurities such as phosphorous or the like, are ion-implanted into the silicon substrate, and an impurity layer is formed. The dummy oxide film is the buffer film for the ion implantation.
Then, the dummy oxide film is removed, and thermal oxidation is performed again, and a gate oxide film is formed on the impurity layer. This is a capacitance oxide film, and at the same time, a gate oxide film of a MOSFET.
Further, the polycrystalline silicon layer is formed on the gate oxide film. In this manner, the capacitance element formed of the gate oxide film and the polycrystalline silicon layer is formed.
However, after the element separation film is formed by the PBL method, there is a removing process of the pad polycrystalline silicon layer, and further, the formation and removing process of the dummy oxide film, and therefore, there are many manufacturing processes.
Further, when the capacitance oxide film is formed on the impurity layer, there is a problem that the film thickness is increased by the impurity enhanced oxidation, and the capacitance value per unit area is decreased. For example, when phosphorous is implanted by a dose amount of 1xc3x971015/cm2, in the case where the oxide film thickness is 100 xc3x85 on the silicon substrate having no impurity layer, the film thickness becomes 400 xc3x85 on the impurity layer. This is disadvantageous in that, when such the capacitance element is used, for example, for the capacitor of a DRAM, its occupancy area on a chip is increased.
Accordingly, an object of the present invention is to provide the structure of the semiconductor device by which the production processes can be reduced in the semiconductor device having the capacitance element, and its production method.
Further object of the present invention is to solve a problem of the impurity enhanced oxidation accompanied by the formation of the capacitance oxide film, and to reduce the occupancy area of the capacitance element.
The above described and the other objects and new characteristics of the present invention will be cleared from the description of the present specification and accompanied drawings.
Outlines of the representative embodiments in the present invention will be explained as follows.
A semiconductor device having a capacitance element of the first aspect comprises: an element separation film formed so as to surround an element formation area on the first conductive-type semiconductor substrate; the second conductive-type impurity layer formed on the surface of the element formation area; a capacitance insulation film formed of a pad oxide film formed on the impurity layer; the first silicon layer formed of a pad silicon layer formed on the capacitance insulation film; and the second silicon layer which is formed on the first silicon layer and extends on the element separation film, and the first and the second silicon layers are made an upper electrode of the capacitance element, and the impurity layer is made a lower electrode of the capacitance element.
According to such an aspect, the pad oxide film and the pad silicon layer used at the time of the element separation film formation are not removed, and are respectively used as the capacitance insulation film and the first silicon layer, therefore, by omitting removing process of these film and layer, the production process of the semiconductor device having the capacitance element can be reduced. Further, in the element formation area, the first and the second silicon layers are stacked, and further, the second silicon layer extends for wiring on the element separation film, therefore, the difference in level between the upper electrode and the wiring on the element separation film can be reduced.
The semiconductor device having the capacitance element of the second aspect is that, in the first aspect, the first and the second silicon layers are a polycrystalline silicon layer or an amorphous silicon layer.
The semiconductor device having the capacitance element of the third aspect is that, in the second aspect, the first silicon layer is the polycrystalline silicon layer or the amorphous silicon layer in which the impurities are doped in higher density than that of the second silicon layer.
When the second silicon layer is made to the silicide, it is not necessary to be doped in high density, and because the second silicon layer positioned on the element separation film is not doped in high density, it is prevented that the impurities reach the surface of the element separation film and thereby, deterioration of dielectric strength and moisture resistance occurs.
The semiconductor device having the capacitance element of the fourth aspect is that the second silicon layer is covered by the metallic silicide film in the first or the second aspect.
According to such the means, the resistance of the silicon layer can be reduced.
The semiconductor device having the capacitance element of the fifth aspect is as follows: it has: the capacitance element comprising the element separation film formed so as to surround the element formation area on the first conductive-type semiconductor substrate, the second conductive-type impurity layer formed on the surface of the element formation area; the insulation film formed of the pad oxide film formed in the element formation area, and a cell plate electrode formed on the insulation film; and the MOSFET composed of a source layer which is formed in the situation that it adjoins the capacitance element and is superimposed on the impurity layer, a drain layer constituting a bit line, the insulation film constituting a gate insulation film, and a gate electrode constituting a word line, in which the cell plate electrode and the gate electrode are structured such that the first silicon layer and the second silicon layer which are formed of the pad silicon layers, are stacked on the element formation area, and the second silicon layer constituting the cell plate electrode extends on the element separation film.
According to such the means, the production process of a memory cell of the DRAM having the capacitance element can be shortened.
A method of producing a semiconductor device having the capacitance element of the sixth aspect has: a process forming the pad oxide film, the first silicon layer and the oxidation resisting film on the element formation area of the semiconductor substrate; a process forming the element separation film by the thermal oxidation; a process in which only the oxidation resiting film is removed, and the pad oxide film and the first silicon layer are left in the element formation area; a process by which ion implantation is performed passing through the pad oxide film and the first polycrystalline silicon layer, and the second conductive-type impurity layer is formed on the surface of the semiconductor substrate; and a process by which the second silicon layer is formed on the first polycrystalline silicon, in which the first and the second silicon layers are the upper electrode of the capacitance element, the pad oxide film is the capacitance insulation film, and the second conductive-type impurity layer is the lower electrode of the capacitance element.
According to the above described means, when the element separation oxide film is formed, the pad oxide film and the first silicon layer are used as a stress buffering member, and these are not removed, and when the impurity layer which is the lower electrode of the capacitance element, is formed by the ion implantation, these are used as buffer films for the ion implantation. When the first silicon layer is thinly formed, the acceleration energy of the ion implantation may be small.
According to this, the removing process of the pad oxide film and the pad polycrystalline silicon layer in the conventional example, and the dummy oxidation and its removing process can be omitted, thereby, the processes can be shortened.
Further, the pad oxide film is used as the capacitance insulation film, and after formation of the pad oxide film, the impurity layer is formed. Accordingly, the impurity enhanced oxidation at the formation of the capacitance insulation film can be suppressed.
A method of producing a semiconductor device having the capacitance element of the seventh aspect has: a process to form the pad oxide film, the first silicon layer, and the silicon nitride film on the element formation area on the semiconductor substrate; a process to form the element separation oxide film by the thermal oxidation; a process by which only nitride film is removed, and the pad oxide film and the first silicon layer are left in the element formation area; a process in which the ion implantation is performed passing through the pad oxide film and the first silicon layer, and the second conductive-type impurity layer is formed on the surface of the semiconductor substrate; a process to form the second silicon layer on the first silicon; a process to remove the first and the second silicon layers and the pad oxide film on a contact formation area defined on the element formation area; and a process to form a metallic electrode to contact to the second conductive-type impurity layer exposed on the contact formation area, in which the first and the second silicon layers are the upper electrode of the capacitance element, the pad oxide film is the capacitance insulation film, and the second conductive-type impurity layer is the lower electrode of the capacitance element. According to such the means, the same effects as in the sixth aspect can be obtained.
A method of producing a semiconductor device having the capacitance element of the eighth aspect is that, in the sixth and the seventh aspects, the first and the second silicon layers are the polycrystalline silicon layer or amorphous silicon layer.
A method of producing a semiconductor device having the capacitance element of the ninth aspect is that the first silicon layer is the polycrystalline silicon layer or amorphous silicon layer in which the impurities in the first silicon layer are doped in higher density than that in the second silicon layer.
A method of producing a semiconductor device having the capacitance element of the tenth aspect is that, in the sixth or the seventh aspect, the second silicon layer is covered with the metallic silicide film.